core/algebra
Shay b40422e9db perf(rust): versor_apply f64 parity port — 29x over Python, bit-identical
Closes the last open Rust parity gate from ADR-0020.

Kernel: new versor_apply_closed_f64 in core-rs/src/versor.rs performs
the full sandwich V·F·rev(V) + closure in f64, mirroring Python's
algebra.versor.versor_apply + _close_applied_versor exactly:
  - no null-vector early branch (Python doesn't have one)
  - unitize_versor with dense-support seed fallback gate
  - post-unitize versor_condition < 1e-6 recheck
  - seed_to_rotor on failure, passthrough as last resort

PyO3 binding: versor_apply_with_closure_f64 accepts/returns float64
arrays through new extract_f64_slice / f64_array_to_numpy helpers.
algebra/backend.py::versor_apply routes through it under CORE_BACKEND=rust.

Parity gate re-enabled (was skipped pending this port). 8/8 bit-
identical across normalized hot-path + identity-versor cases.

Bench (5000 iters, runtime hot path):
  python: 213.0 us/call
  rust:     7.4 us/call  → 28.8x speedup

All lanes green: algebra 132 (was 124+8skip), smoke 54, runtime 19,
cognition 57, teaching 17, packs 6. Cognition eval 100% across all metrics.

PROGRESS.md updated: versor_apply marked passing; Phase 5 Rust parity
track now 5/5 surfaces gated and enabled.
2026-05-16 20:43:01 -07:00
..
__init__.py arch: close coordinate back-door in vocab layer 2026-05-12 20:52:14 -07:00
backend.py perf(rust): versor_apply f64 parity port — 29x over Python, bit-identical 2026-05-16 20:43:01 -07:00
cga.py Fix fail-closed versor construction 2026-05-14 12:13:04 -07:00
cl41.py Fix fail-closed versor construction 2026-05-14 12:13:04 -07:00
holonomy.py Fix test suite errors across core physics and generation 2026-05-14 13:02:32 -07:00
rotor.py fix(drift): proper rotor-manifold scaling; restore respond contract 2026-05-16 11:44:45 -07:00
versor.py fix(algebra): enforce strict runtime closure after unitize 2026-05-15 23:23:11 -07:00