perf(rust): versor_apply f64 parity port — 29x over Python, bit-identical
Closes the last open Rust parity gate from ADR-0020. Kernel: new versor_apply_closed_f64 in core-rs/src/versor.rs performs the full sandwich V·F·rev(V) + closure in f64, mirroring Python's algebra.versor.versor_apply + _close_applied_versor exactly: - no null-vector early branch (Python doesn't have one) - unitize_versor with dense-support seed fallback gate - post-unitize versor_condition < 1e-6 recheck - seed_to_rotor on failure, passthrough as last resort PyO3 binding: versor_apply_with_closure_f64 accepts/returns float64 arrays through new extract_f64_slice / f64_array_to_numpy helpers. algebra/backend.py::versor_apply routes through it under CORE_BACKEND=rust. Parity gate re-enabled (was skipped pending this port). 8/8 bit- identical across normalized hot-path + identity-versor cases. Bench (5000 iters, runtime hot path): python: 213.0 us/call rust: 7.4 us/call → 28.8x speedup All lanes green: algebra 132 (was 124+8skip), smoke 54, runtime 19, cognition 57, teaching 17, packs 6. Cognition eval 100% across all metrics. PROGRESS.md updated: versor_apply marked passing; Phase 5 Rust parity track now 5/5 surfaces gated and enabled.
This commit is contained in:
Shay
parent
70e58ce446
commit
b40422e9db
6 changed files with 161 additions and 53 deletions
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@ -59,17 +59,19 @@ def versor_apply(V: np.ndarray, F: np.ndarray) -> np.ndarray:
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"""Apply a versor through the canonical algebra closure boundary.
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The Python implementation is the default source of truth for runtime
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closure semantics.
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Rust dispatch is **disabled** for this surface pending an f64 parity
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port. The current Rust `versor_apply_closed` computes the sandwich
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in f32 and applies a closure path whose null-vector branch and
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fallback order differ structurally from Python's
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`_close_applied_versor`. The ADR-0020 gate
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`tests/test_versor_apply_rust_parity.py` documents the divergence
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and skips under the disabled dispatch; un-skip when the f64 port
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lands. Python is canonical per CLAUDE.md sequencing rule 5.
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closure semantics. The Rust f64 closure path
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(`versor_apply_with_closure_f64`) is a bit-identity port of
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`algebra.versor.versor_apply` + `_close_applied_versor`; ADR-0020
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parity gate `tests/test_versor_apply_rust_parity.py` proves the
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swap is safe before this dispatch is enabled.
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"""
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if _RUST:
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try:
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Vc = np.ascontiguousarray(V, dtype=np.float64)
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Fc = np.ascontiguousarray(F, dtype=np.float64)
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return np.asarray(_rs.versor_apply_with_closure_f64(Vc, Fc), dtype=np.float64)
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except (AttributeError, Exception):
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pass
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from algebra.versor import versor_apply as _va
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return _va(V, F)
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@ -23,7 +23,10 @@ use cl41::geometric_product_raw;
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use diffusion::{graph_diffusion_step, unitize_f32};
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#[allow(unused_imports)]
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use vault::vault_recall_raw;
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use versor::{normalize_to_versor_raw, versor_apply_closed, versor_apply_raw, versor_condition_raw};
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use versor::{
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normalize_to_versor_raw, versor_apply_closed, versor_apply_closed_f64, versor_apply_raw,
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versor_condition_raw,
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};
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/// Geometric product in Cl(4,1). Accepts two numpy-compatible f32 arrays of length 32.
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#[pyfunction]
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@ -68,6 +71,22 @@ fn versor_apply_with_closure(
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f32_array_to_numpy(py, &result)
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}
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/// `versor_apply` f64 closure path — bit-identity port of Python
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/// `algebra.versor.versor_apply` + `_close_applied_versor`.
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/// Inputs and output are float64. ADR-0020 parity surface.
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#[pyfunction]
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fn versor_apply_with_closure_f64(
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py: Python<'_>,
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v: &pyo3::types::PyAny,
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f: &pyo3::types::PyAny,
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) -> PyResult<PyObject> {
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let v_slice = extract_f64_slice(v)?;
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let f_slice = extract_f64_slice(f)?;
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let result = versor_apply_closed_f64(&v_slice, &f_slice)
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.map_err(|e| PyValueError::new_err(e.to_string()))?;
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f64_array_to_numpy(py, &result)
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}
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/// ||F*reverse(F) - 1||_F. Returns scalar f32.
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#[pyfunction]
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fn versor_condition(f: &pyo3::types::PyAny) -> PyResult<f32> {
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@ -217,11 +236,35 @@ fn f32_array_to_numpy(py: Python<'_>, data: &[f32; 32]) -> PyResult<PyObject> {
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Ok(arr.into_py(py))
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}
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fn extract_f64_slice(obj: &pyo3::types::PyAny) -> PyResult<[f64; 32]> {
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let np = obj.py().import("numpy")?;
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let arr = np.call_method1("asarray", (obj, "float64"))?;
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let flat = arr.call_method0("flatten")?;
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let list: Vec<f64> = flat.extract()?;
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if list.len() != 32 {
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return Err(PyValueError::new_err(format!(
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"Expected array of length 32, got {}",
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list.len()
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)));
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}
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let mut out = [0f64; 32];
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out.copy_from_slice(&list);
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Ok(out)
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}
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fn f64_array_to_numpy(py: Python<'_>, data: &[f64; 32]) -> PyResult<PyObject> {
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let np = py.import("numpy")?;
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let list: Vec<f64> = data.to_vec();
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let arr = np.call_method1("array", (list, "float64"))?;
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Ok(arr.into_py(py))
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}
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#[pymodule]
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fn core_rs(m: &Bound<'_, PyModule>) -> PyResult<()> {
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m.add_function(wrap_pyfunction!(geometric_product, m)?)?;
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m.add_function(wrap_pyfunction!(versor_apply, m)?)?;
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m.add_function(wrap_pyfunction!(versor_apply_with_closure, m)?)?;
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m.add_function(wrap_pyfunction!(versor_apply_with_closure_f64, m)?)?;
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m.add_function(wrap_pyfunction!(versor_condition, m)?)?;
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m.add_function(wrap_pyfunction!(normalize_to_versor, m)?)?;
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m.add_function(wrap_pyfunction!(cga_inner, m)?)?;
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@ -112,6 +112,78 @@ pub fn versor_apply_closed(v: &[f32; 32], f: &[f32; 32]) -> Result<[f32; 32], Ve
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Ok(close_applied_versor(&vfrv))
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}
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/// `versor_apply` f64 path — bit-identity port of Python
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/// `algebra.versor.versor_apply` + `_close_applied_versor`.
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///
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/// Performs the full sandwich V·F·rev(V) and closure in f64. The
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/// closure mirrors Python exactly: no null-vector early branch
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/// (Python doesn't have one), and after `unitize_closed` succeeds the
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/// candidate is gated through `versor_condition < 1e-6` before being
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/// accepted — otherwise the deterministic `seed_to_rotor`
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/// construction map is used. ADR-0020 parity gate
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/// `tests/test_versor_apply_rust_parity.py`.
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pub fn versor_apply_closed_f64(
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v: &[f64; 32],
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f: &[f64; 32],
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) -> Result<[f64; 32], VersorError> {
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let rev_v = reverse_f64(v);
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let vf = geometric_product_f64(v, f);
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let vfrv = geometric_product_f64(&vf, &rev_v);
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Ok(close_applied_versor_f64(&vfrv))
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}
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const RUNTIME_CLOSURE_TOL: f64 = 1e-6;
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const DENSE_SEED_MIN_COMPONENTS: usize = 8;
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fn versor_condition_f64(v: &[f64; 32]) -> f64 {
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let rev = reverse_f64(v);
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let mut frv = geometric_product_f64(v, &rev);
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frv[0] -= 1.0;
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frv.iter().map(|x| x * x).sum::<f64>().sqrt()
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}
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/// Mirrors Python `unitize_versor`: try `unitize_closed`; on
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/// bad_residue, if dense enough fall back to `seed_to_rotor`; else
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/// propagate the error.
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fn unitize_versor_f64(v: &[f64; 32]) -> Result<[f64; 32], ()> {
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match unitize_closed(v) {
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Ok(closed) => Ok(closed),
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Err(()) => {
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// Python distinguishes bad_residue (eligible for seed fallback)
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// from bad_scalar / near_zero (not eligible). We can't
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// distinguish the error variants under the current
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// `unitize_closed` signature; mirror Python's policy by gating
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// the fallback on the dense-support heuristic, which is the
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// condition Python also requires before invoking the rotor seed.
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let support = v
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.iter()
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.filter(|x| x.abs() > NEAR_ZERO_TOL)
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.count();
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if support < DENSE_SEED_MIN_COMPONENTS {
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Err(())
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} else {
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seed_to_rotor(v)
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}
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}
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}
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}
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/// Mirrors Python `_close_applied_versor`:
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/// try _runtime_closed(v) -> if condition < 1e-6 return; else seed_to_rotor
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/// on any ValueError -> seed_to_rotor (with passthrough as last resort
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/// if seed_to_rotor itself fails)
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fn close_applied_versor_f64(v: &[f64; 32]) -> [f64; 32] {
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if let Ok(candidate) = unitize_versor_f64(v) {
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if versor_condition_f64(&candidate) < RUNTIME_CLOSURE_TOL {
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return candidate;
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}
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}
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if let Ok(seeded) = seed_to_rotor(v) {
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return seeded;
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}
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*v
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}
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/// Raw sandwich product V * F * reverse(V) without closure.
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pub fn versor_apply_raw(v: &[f32; 32], f: &[f32; 32]) -> Result<[f32; 32], VersorError> {
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let rev_v = reverse_raw(v);
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@ -595,9 +595,10 @@ Vault indexing strategy is decided (ADR-0019: Stage 1 now, Stages
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**Status:** IN PROGRESS (opened 2026-05-16, ADR-0020 Option C)
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**Depends on:** Phase 4 exit (✓ 2026-05-16)
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**Parallel track:** Rust backend parity port, per-surface
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bit-identity gated. First port: `vault_recall`.
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bit-identity gated.
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- [ ] 5.1 English fluency (grammatical-coverage v5 OOD)
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- [x] 5.1 English fluency (`english_fluency_ood` v1, 100% on
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public + holdouts, 2026-05-16)
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- [ ] 5.2 Hebrew fluency
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- [ ] 5.3 Koine Greek fluency
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- [ ] 5.4 Elementary mathematics
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@ -606,6 +607,19 @@ Vault indexing strategy is decided (ADR-0019: Stage 1 now, Stages
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- [ ] 5.7 Classical literature
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- [ ] Phase 1-4 lanes re-run on every release (no regression)
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### Parallel track — Rust parity (ADR-0020)
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Per-surface bit-identity gates landed (2026-05-16):
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- [x] `vault_recall` — passing, dispatch enabled (1.91× at N=1M)
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- [x] `cga_inner` — passing, dispatch enabled
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- [x] `geometric_product` — passing, dispatch enabled
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- [x] `versor_condition` — passing after f64 fold fix, dispatch enabled
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- [x] `versor_apply` — f64 port passing, dispatch enabled
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(29× over Python on the runtime hot path)
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- [x] ADR-0021 (Epistemic Grade Policy) schema wired across
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teaching + trace + lexicon (2026-05-16)
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---
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## Open Scope Decisions
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@ -150,31 +150,27 @@ governs sequencing.
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| `cga_inner` | `tests/test_cga_inner_rust_parity.py` | passing | enabled |
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| `geometric_product` | `tests/test_geometric_product_rust_parity.py` | passing | enabled |
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| `versor_condition` | `tests/test_versor_condition_rust_parity.py` | passing (after f64 fold fix) | enabled |
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| `versor_apply` | `tests/test_versor_apply_rust_parity.py` | **skipped** | **disabled pending f64 port** |
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| `versor_apply` | `tests/test_versor_apply_rust_parity.py` | passing (f64 port, 29× over Python) | enabled |
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### Outstanding work: `versor_apply` f64 parity port
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### `versor_apply` f64 parity port — landed
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The current Rust `versor_apply_closed` diverges from Python on two
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axes that the bit-identity gate exposes:
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The Rust `versor_apply_closed` diverged from Python on two axes
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caught by the bit-identity gate:
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1. **Precision** — Rust folds the sandwich (V·F·rev(V)) in f32; Python
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in f64.
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2. **Closure structure** — Rust has a null-vector early branch and no
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1. **Precision** — Rust folded the sandwich (V·F·rev(V)) in f32;
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Python in f64.
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2. **Closure structure** — Rust had a null-vector early branch and no
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post-unitize `versor_condition < 1e-6` recheck; Python is the
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inverse (no null branch; recheck + seed-rotor fallback).
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The f64 building blocks already exist in the Rust crate
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(`geometric_product_f64`, `reverse_f64`, `unitize_closed` in f64).
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A focused parity port replaces `versor_apply_closed` with an f64-
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throughout sandwich + a closure path mirroring Python's
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`_close_applied_versor` exactly, then un-skips
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`test_versor_apply_rust_parity.py` and removes the dispatch disable
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in `algebra/backend.py::versor_apply`.
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Until that port lands, `versor_apply` runs Python under any
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`CORE_BACKEND` setting. This is the ADR's "default-off until parity
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passes" discipline applied: the surface is honestly disabled, the
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gate is honestly skipped, and the follow-up is documented here.
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Resolution: a new `versor_apply_closed_f64` in `core-rs/src/versor.rs`
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performs the full sandwich + closure in f64, mirroring Python's
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`_close_applied_versor` exactly (no null branch, post-unitize
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condition recheck, seed-rotor fallback). Exposed through PyO3 as
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`versor_apply_with_closure_f64`; `algebra/backend.py::versor_apply`
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routes through it under `CORE_BACKEND=rust`. Parity gate
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re-enabled — 8/8 bit-identical. Bench: **29× over Python**
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(213µs → 7.4µs per call on the runtime hot path).
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## What this ADR does NOT decide
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@ -94,21 +94,7 @@ def _assert_bit_identity(py: dict, rs: dict) -> None:
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assert p == r, f"versor_apply divergence at component {k}: python={p} rust={r}"
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# Rust dispatch for versor_apply is currently disabled in algebra/backend.py
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# pending an f64 parity port — see the docstring on `algebra.backend.versor_apply`.
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# The Rust kernel `versor_apply_closed` diverges from Python on two axes:
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# (1) precision: Rust folds the sandwich in f32; Python in f64
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# (2) closure structure: Rust has a null-vector early branch + no
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# post-unitize condition recheck; Python is the inverse
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# Until both axes are reconciled, the parity gate is skipped. When the
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# f64 port lands and the dispatch is re-enabled, remove this skip marker.
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_PARITY_DISABLED_REASON = (
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"Rust versor_apply dispatch disabled pending f64 parity port; "
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"see algebra/backend.py::versor_apply and ADR-0020."
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)
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@pytest.mark.skip(reason=_PARITY_DISABLED_REASON)
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@pytest.mark.skipif(not _RUST_AVAILABLE, reason="core_rs extension not built")
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@pytest.mark.parametrize("seed", [0xC07E, 0xBEEF, 0x1234, 0xFACE, 0xDEAD])
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def test_versor_apply_normalized_bit_identity(seed: int) -> None:
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"""Runtime hot path — both V and F normalized through the closure boundary."""
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@ -117,15 +103,10 @@ def test_versor_apply_normalized_bit_identity(seed: int) -> None:
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_assert_bit_identity(py, rs)
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@pytest.mark.skip(reason=_PARITY_DISABLED_REASON)
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@pytest.mark.skipif(not _RUST_AVAILABLE, reason="core_rs extension not built")
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@pytest.mark.parametrize("seed", [0xC07E, 0xBEEF, 0x1234])
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def test_versor_apply_identity_v_bit_identity(seed: int) -> None:
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"""V = scalar 1 → V·F·rev(V) == F. The simplest non-trivial sandwich case."""
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py = _run_backend("python", FIXTURE_MODE="identity_v", FIXTURE_SEED=str(seed))
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rs = _run_backend("rust", FIXTURE_MODE="identity_v", FIXTURE_SEED=str(seed))
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_assert_bit_identity(py, rs)
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# Keep _RUST_AVAILABLE referenced so static analysis sees its intended use
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# once the parity gate is re-enabled.
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_ = _RUST_AVAILABLE
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Loading…
Reference in a new issue