Closes the two skipped null-preservation tests and the architectural
gap behind them. In CGA, null vectors represent Euclidean points;
under a conformal transformation a point must map to a point —
applying a versor sandwich to a null vector must preserve null
property. The previous implementation forced everything onto the
unit-versor shell, which is correct for field-state propagation but
wrong for geometric point input.
Implementation
- algebra/versor.py: new `_input_is_null(F)` checks `cga_inner(F,F) ≈ 0`;
`versor_apply` routes null inputs around `_close_applied_versor`
and returns the raw sandwich V·F·rev(V), which algebraically
preserves null property. Non-null inputs unchanged.
- core-rs/src/versor.rs: `versor_apply_closed_f64` gains the same
null-check branch via `input_is_null_f64`. ADR-0020 parity
preserved (8/8 versor_apply bit-identity tests still pass).
Test changes
- tests/test_architectural_invariants.py::TestINV06NullConePreservation::
test_versor_apply_preserves_null_property — un-skipped, passes.
- tests/test_rust_backend.py::test_rust_versor_apply_preserves_null_vectors
— un-skipped, passes.
- tests/test_versor_closure.py::test_versor_apply_closes_null_like_field_
results_for_runtime_contract — renamed to
test_versor_apply_preserves_null_property_for_null_inputs and
rewritten to assert the now-correct semantics (null in → null out).
The old contract over-specified closure for null inputs and
contradicted the architectural invariant; that's what kept the
invariant test skipped.
Stale gap docs updated
- inference_closure / cross_domain_transfer / multi_step_reasoning
gaps.md now lead with a resolution block: lanes pass at 100% on
both splits after the typed operators (transitive_walk,
multi_relation_walk, path_recall in generate/operators.py) +
pipeline wiring (_maybe_transitive_walk + _fold_walk_into_surface)
landed. The historic findings are preserved below for traceability.
- compositionality gaps.md: partial resolution — recall up from
6.25% to 68.75%; overall_pass True; residual ~30% miss requires
a relation-aware `compose_relations` operator (v2 follow-on).
Lane health unchanged: algebra 132, smoke 55, runtime 19, teaching 17,
packs 6, cognition 103. Cognition eval 100%. Four formerly-"blocked"
reasoning lanes confirmed 100% / overall_pass=True end-to-end.
ADR-0020 next-level: close the parity-gate hole on the four remaining
ungated Rust surfaces.
Gates landed (subprocess-based, raw f32/f64 byte equality):
cga_inner — 14/14 bit-identical (random + basis blades + self-norm)
geometric_product — 15/15 bit-identical (random + basis blades + scalar identity)
versor_condition — 9/9 bit-identical AFTER kernel fix
versor_apply — 8/8 intentionally skipped (see below)
Kernel fix: versor_condition_raw
The Python source-of-truth (algebra.versor.versor_unit_residual) folds
the geometric product + identity subtraction + Frobenius norm in f64.
The Rust kernel was folding in f32, drifting by 1 ULP on out-of-shell
inputs. Rewrote versor_condition_raw to promote inputs to f64, use the
existing geometric_product_f64/reverse_f64 building blocks, and cast
only the final scalar back to f32. Python is canonical per CLAUDE.md
sequencing rule 5.
Honest disable: versor_apply
The Rust versor_apply_closed diverges structurally:
(1) precision — f32 sandwich vs Python's f64 throughout
(2) closure form — Rust has a null-vector early branch + no
post-unitize condition recheck; Python is the
inverse (no null branch; recheck + seed-rotor
fallback)
Per ADR-0020 "default-off until parity passes", the Rust dispatch for
versor_apply is disabled in algebra/backend.py with a pointer to the
gate. The parity tests are skipped with explicit reason. The follow-up
f64 port is documented in the ADR's new Parity status table.
Lane registration: all four parity files added to --suite algebra.
After: algebra 124 passed, 8 skipped (was 86). All other lanes green:
smoke 54, runtime 19, cognition 57, teaching 17, packs 6. Cognition
eval 100%.
ADR-0020 follow-on (task #35). Two-pronged fix:
1. Kernel: ported ADR-0019 Stage 1 diagonal-metric kernel to
core-rs/src/vault.rs. Per-versor scoring is now 32 multiplies
+ 32 adds via the precomputed Cl(4,1) metric, not the
1024-op full geometric_product the prior path computed.
Bit-identity preserved by serial fold order matching Python.
2. Zero-copy marshalling: replaced Vec<&PyAny> + extract-per-
versor with PyReadonlyArray2<f32> via the numpy Rust crate.
The Rust binding now reads a slice view directly into the
numpy buffer — no Python→Rust copy, no Vec<[f32;32]>
re-chunk. Python caller passes the (N, 32) ndarray as-is
(ascontiguousarray ensures C-contiguous f32).
Result:
N python rust speedup
1k 0.20ms 0.26ms 0.77x (Python wins on fixed overhead)
10k 1.62ms 1.45ms 1.12x
100k 19.22ms 12.93ms 1.49x
1M 251.50ms 131.36ms 1.91x
Parity bit-identical (raw f32 bytes) at every scale across the
parameterised test in tests/test_vault_recall_rust_parity.py.
Both ADR-0020 first-surface gates now pass: parity AND
performance at the scales where Rust is meant to win. Python
remains the default per CLAUDE.md sequencing rule 5;
CORE_BACKEND=rust is now a legitimate opt-in acceleration.
Smoke 27/27, algebra 70/70, runtime 19/19 all green.
