Shay
99a107dd39
feat(rust): scalar Cl(4,1) zero-copy input boundary (ADR-0235 PR C) ( #907 )
...
Replace extract_f32_slice list conversion on geometric_product, cga_inner,
versor_condition, versor_apply_with_closure, and versor_apply_with_closure_f64
with PyReadonlyArray1 zero-copy views. Wrong shape, dtype, and non-contiguous
layouts fail loudly. Update Apple UMA benchmark truth table and claim audit
after parity gates pass.
2026-06-24 13:11:38 -07:00
Shay
daa13684f8
feat(bench): Rust-enabled Apple UMA baseline report lane (PR B) ( #906 )
...
Add rust_backend_status helper, backend_status report fields, and
rust_backend_notes in claim safety audit. Improve diffusion_step skip
reasons and markdown backend summary. Document core_rs install and
CORE_BACKEND=rust activation in docs/benchmarks/apple-uma-rust-baseline.md.
Regenerate seed report under honest Python fallback (core_rs unavailable
locally). No scalar Rust binding changes.
2026-06-24 12:56:57 -07:00
Shay
7132997511
feat(bench): Apple Silicon UMA mechanical sympathy benchmark ( #904 )
...
* feat(bench): add Apple Silicon UMA mechanical sympathy benchmark
Engineering-grade reproducible benchmark measuring exact CGA recall,
Cl(4,1) scalar algebra, FrameVerdict TTFV, array_codec replay, and
honest Python/Rust copy/zero-copy boundaries. Runs without Rust;
skips Rust-only tracks with explicit reasons. Includes claim-safety
audit, CLI integration (core bench --suite apple-uma), and outreach brief.
* fix(bench): patch apple-uma report paths, decode timing, CLI --report
- Use repo-relative report_path in JSON metadata (no absolute paths)
- Measure decode_array only; precompute encode payload before decode bench
- core bench apple-uma --report writes exactly to PATH; --write-report for defaults
- Add final newlines; regenerate seed report
2026-06-24 12:36:02 -07:00
