docs(adr-0244-d4): Phase 5 COMPLETE — §2.7/§2.9/§2.10 + ADR-0245 §3 gate
Plan doc (scope tables + Phase 5 status/resume + progress log + dashboard) and
ADR-0245 status map updated: §2.3 residual done (5a), §2.9 proven (5b), §2.10
audited (5c), §3 acceptance gate all four legs green (5d). Also corrected the
Phase-4 SHA reference (17ec6eee → 918aa843, amend lag). Next: Phase 6 close-out;
all build phases (0-5) complete.
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@ -18,17 +18,17 @@
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> | 2.1 | PyO3 Rust `geometric_product` f32 fast-path | ✅ **Done** — `algebra/backend.py`, pre-existing before this arc. |
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> | 2.2 | Gated f64→f32 serving boundary | ✅ **Built (D4 Phase 4)** — `serving_cast(psi_steady, certificate, verdict) → ServingState` in `cognitive_lifecycle.py`. A single explicit, fail-closed down-cast at the certified egress: casts only a certified/admitted/digest-matched state, precision-checks the f32 result (fails closed on a cliff), and keeps f64 as the source of truth (the digest chain is untouched). Same contract as ADR-0244 §2.5. Pinned by `tests/test_adr_0244_serving_cast.py` (10 tests). |
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> | 2.3 | Semantic rigor in content addressing (full 256-bit digest, no `default=str`, byte-order guard) | ◐ **Hot-path done, residual open** — `cognitive_lifecycle.py` / `biography_wiring.py` / `self_authorship.py` fixed (cohesion-directive D1). Three contemplation-module content-id sites (`core/contemplation/schema.py`, `plan_preflight.py`, `miners/articulation_quality.py`) still truncate to 16 hex chars and/or use `default=str` — D4 Phase 5. |
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> | 2.3 | Semantic rigor in content addressing (full 256-bit digest, no `default=str`, byte-order guard) | ✅ **Done (D4 Phase 5a)** — hot path fixed at D1; the residual contemplation/vault sites now full-digest: `schema._content_digest`, `plan_preflight._plan_substrate_hash`, `miners/articulation_quality` (dropped `default=str`), and `holographic_vault._default_mode_id` (full digest + explicit LE byte-order). No truncation, no `default=str`, no bare `.tobytes()` left in these content-addresses. |
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> | 2.4 | `_cached_eigh` memoization (`functools.lru_cache`, keyed on `hamiltonian_id` + `matrix.tobytes()`) | ✅ **Done** — `core/physics/cognitive_lifecycle.py::_cached_eigh` (cohesion-directive D2), exactly as specified including the canonical two-part cache key. |
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>
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> **§3 acceptance gate — partial:**
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> **§3 acceptance gate — ✅ complete (D4 Phase 5d):**
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>
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> - **Accuracy & parity** (bit-identical Rust vs Python, N=10,000): ✅ done — `tests/test_geometric_product_f64_parity.py::test_rust_f64_gp_is_bit_identical_to_python_n10000` (the f64 kernel; the f32 kernel referenced in §2.1 predates this arc and has its own long-standing parity coverage).
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> - **Latency & throughput** (≥10× speedup, dense products, Rust vs pure-Python): ❌ **not benchmarked** — no test asserts a speedup ratio. D4 Phase 5 gap.
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> - **Memory allocations** (`_cached_eigh` ⇒ 0 heap allocations / 0 LAPACK calls on repeat): ◐ partially covered by `tests/test_adr_0244_mechanical_sympathy.py`; full 0-allocation assertion is D4 Phase 5 work.
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> - **Collision resistance** (`_content_id`, no two distinct metadata dicts collide under the strict path): ❌ **not proven** — D4 Phase 5 gap.
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> - **Accuracy & parity** (bit-identical Rust vs Python, N=10,000): ✅ done — `tests/test_geometric_product_f64_parity.py` (f64) + `tests/test_geometric_product_rust_parity.py` (f32, component-exact).
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> - **Latency & throughput** (≥10× f32 speedup, Rust vs pure-Python): ✅ done — `tests/test_adr_0245_acceptance_gate.py::test_rust_f32_geometric_product_is_at_least_10x` (Rust-guarded; skips with reason where `core_rs` is unbuilt). Measured on Apple M-series: rust 2.86 µs/op vs python 1340 µs/op = **467×** (asserts a conservative ≥10× with a parity sanity check).
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> - **Memory allocations / 0 LAPACK on repeat** (`_cached_eigh`): ✅ done — `tests/test_adr_0244_mechanical_sympathy.py` (cache hit returns identical objects → no fresh `eigh`).
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> - **Collision resistance** (`_content_id`): ✅ done — `tests/test_adr_0245_acceptance_gate.py` (full 256-bit, type/structure-faithful, fail-closed on non-serializable; `_psi_digest` sub-epsilon sensitive).
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>
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> This ADR's remaining scope (§2.2 cast contract + the four §3 gaps above) is tracked as part of **D4** alongside ADR-0244. See `docs/handoff/ADR-0244-D4-IMPLEMENTATION-PLAN.md` (Phase 4 for §2.2, Phase 5 for the §3 gate) and `docs/analysis/adr-0244-cohesion-directive-audit-2026-07-17.md` for the prior mandate audit that landed §2.1/§2.3(hot-path)/§2.4.
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> All four §3 legs are green and mapped by a coverage-manifest test. ADR-0245's D4 scope (§2.2 cast + §2.3 residual + §3 gate) is complete; see `docs/handoff/ADR-0244-D4-IMPLEMENTATION-PLAN.md` and `docs/analysis/adr-0244-cohesion-directive-audit-2026-07-17.md`.
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---
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@ -34,10 +34,10 @@ ADR-0244 is the **identity-layer consumer**; ADR-0245 is the **mechanical-sympat
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| 2.4 | Bracketed-local Fibonacci search + `γ_id` calibration | ◐ search-honesty done (D3); calibration half unbuilt |
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| 2.5 | Serving-boundary f64→f32 cast contract | ✅ done (Phase 4 — `serving_cast`→`ServingState`, `cognitive_lifecycle.py`) |
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| 2.6 | Rust GP fast-path + parity gate | ✅ done (f32 pre-existing + f64 D2, bit-identical) |
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| 2.7 | Full digests / no `default=str` / byte-order guard | ◐ hot-path done (D1); contemplation content-ids residual |
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| 2.7 | Full digests / no `default=str` / byte-order guard | ✅ done (Phase 5a — 4 residual content-id sites widened) |
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| 2.8 | `eigh` memoization | ✅ done (`_cached_eigh`, D2) |
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| 2.9 | Low-discrepancy mode-centroid allocator | ✅ primitive built (`atlas_packing.py`); **adoption unwired** — needs routing |
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| 2.10 | Fibonacci-word background scheduler | ✅ built + spec-satisfying (`fibonacci_word_schedule.py`); audit-confirm only |
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| 2.9 | Low-discrepancy mode-centroid allocator | ✅ done (Phase 5b — recall order-independence *proven*, not wired; allocator ordinal-reconstructible) |
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| 2.10 | Fibonacci-word background scheduler | ✅ done (Phase 5c — quasi-periodicity claim pinned, not just structure) |
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| ADR-0245 § | Mechanism | Status entering D4 |
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@ -174,8 +174,12 @@ Dependencies: `0 → {1, 4}` · `1 → 2 → 3` · `5 after 0` · `6 last`. Each
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- ADR-0245 §3: add f32 ≥10× speedup benchmark + `_content_id` collision-resistance proof (parity + 0-LAPACK already covered).
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**Acceptance:** no truncated machine merge keys in contemplation content-ids; allocator insertion-order-independent + wired; 0245 §3 four assertions all green.
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**Gate:** smoke + fast lane + new tests.
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**Status:** ⬜ NOT STARTED
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**Resume notes:** —
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**Status:** ✅ DONE — landed 5a `5c69b741` · 5b `4a550c1d` · 5c `eacea087` · 5d `b31d6fde` (+ this docs commit).
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**Resume notes:** Four gated sub-commits.
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- **5a §2.7** (`5c69b741`): widened **four** residual content-id sites to full 256-bit digests — `schema._sha256_16`→`_content_digest` (finding_id/run_id), `plan_preflight._plan_substrate_hash`, `miners/articulation_quality._substrate_hash_for_observations` (also dropped `default=str` — `as_dict` is JSON-native so a non-serializable field now fails closed), and (a 4th site found in-flight, folded in) `holographic_vault._default_mode_id` (full digest **+** explicit LE byte-order, was bare `.tobytes()`). Content-addresses only → no persisted-id migration; 334 contemplation/vault/miner tests green (they assert determinism + content, not id length).
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- **5b §2.9** (`4a550c1d`): **proven, not wired.** `tests/test_adr_0244_mode_order_independence.py` (3 tests) pins that `WaveManifold` recall (`compute_spectral_leakage` → `_metric_project` Gram lstsq onto `span(modes)`) is insertion-order-independent to ~1e-15 (machine eps; nonzero-residual probe too), and `atlas_packing.golden_angle_pack` is ordinal-reconstructible. Wiring the allocator into the content-seal path would be a category mismatch (that path seals content ψ, not packing positions).
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- **5c §2.10** (`eacea087`): audit-confirm. `tests/test_adr_0244_scheduler_quasiperiodicity.py` (32 cases) pins the *load-bearing* "reduce harmonic phase-locking" claim (golden-ratio letter density A/B→φ, no `BB`/no `AAA` clustering, aperiodicity), not just the recurrence structure the D-era test already covered. No production change.
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- **5d §3** (`b31d6fde`): ADR-0245 §3 gate closed. `tests/test_adr_0245_acceptance_gate.py` (6 tests) — Rust-guarded **f32 ≥10× speedup** (measured **467×**: rust 2.86µs vs python 1340µs/op; skips-with-reason where `core_rs` unbuilt) with a parity sanity check, + `_content_id` **collision-resistance** (full 64-hex, type/structure-faithful, fail-closed on non-serializable, `_psi_digest` sub-epsilon sensitive), + a coverage manifest mapping all 4 §3 legs. **Note:** `core_rs` was built in this worktree venv (`maturin develop --release -m core-rs/Cargo.toml`) to run the speedup + the ~126 Rust-parity tests live — all green; the build is a local dev artifact (not committed; backend still falls back to Python by default).
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### Phase 6 — Close-out
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**Objective:** acceptance packets + ratified status flips + memory + cleanup.
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@ -231,7 +235,8 @@ Forward-looking mechanical-sympathy items from the critique — a separate optim
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- **2026-07-17** — **Phase 2b landed `c7e2b3b6`.** Runtime wiring: `identity_wave_gate` flag (`core/config.py`), two flag-gated touches in `chat/runtime.py` (`wave_field=final_state.F` at the identity check; post-verdict boundary supplement + geometric refusal fold), wave telemetry in `chat/telemetry.py` (emitted only when `wave_mode_active`). **Integration bug caught + fixed:** the live versor carries boost (e5) components → `F aᵢ F̃` is NOT Euclidean-norm-preserving → un-normalized leakage/self-align ran to 5.16 / −4.75. Fixed with per-axis normalization in `identity_manifold.py` (leakage fraction ∈ [0,1], signed cosine ∈ [−1,1]; Phase-1 unit-rotor results unchanged; boost test added; §4a updated). Gate: 74 targeted + smoke 176 + fast lane **11883 passed, 109 skipped** (8:26) — flag-off byte-identity confirmed. **Open reality for Phase 3:** value axes are placeholders (e1/e2/e3), so whether the geometric gate DISCRIMINATES adversarial vs benign is an empirical question — 2c measures it. Next: 2c (ablation eval).
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- **2026-07-17** — **Phase 2c landed `c0ff4720` → Phase 2 COMPLETE.** `evals/adr_0244_identity_gate/` (detection-value ablation) + `tests/test_adr_0244_identity_gate_eval.py` (6 tests) + CLI. Measured: the wave gate separates a geometric-attack panel (2 inversions caught by orientation, 4 tilts/boosts caught by subspace leakage) from an aligned in-subspace panel — all attacks flagged, all aligned admitted, `min_attack_signal 0.35 > max_aligned_leakage 0.0`; wave adds detection value 6-vs-0 over the geometry-blind legacy path. Honest caveat baked in: separation is on the *designed* geometric signal; real-encoder separation is empirical (Phase 3). Additive-only (evals/ + test), off-serving (quarantine green). Gate: smoke 176 + fast lane. Next: Phase 3 (γ_id calibration).
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- **2026-07-17** — **Phase 3 landed `f3702ad4` → calibration built + certified; live flag flip BLOCKED by empirical non-separation.** `evals/adr_0244_gamma_calibration/` + `tests/test_adr_0244_gamma_calibration.py` (9 tests). The bracketed-local Fibonacci search certifies `γ* = 0.2126624458513829` (cert `0079b5f201fbf616…`) separating the geometric attack signal; pinned as `identity._WAVE_LEAKAGE_BOUND` and **decoupled the wave path from `alignment_threshold`**. **Then measured the crux the whole arc deferred:** real benign live turns do NOT preserve `span(e1,e2,e3)` — leakage 0.14–0.81 (mean 0.55), self-align to −0.52, **12/13 benign false-refused at γ***, best-achievable balanced error **0.346**. So the calibration certifies `flag_flip_authorized=False`; **`identity_wave_gate` stays OFF**. Root cause: the shipped value axes are *nominal basis vectors, not dynamically-preserved eigenmodes* — no dynamical anchoring in the current field evolution; the fix is the **ADR-0246 induced-action programme** (brief already merged). The wave gate is validated, correctly-off scaffolding. A slow drift-guard test canaries any future change that starts preserving identity. Gate: smoke 176 + fast lane + 59 targeted (incl. wave/ablation/runtime unchanged). Next: Phase 4 (§2.5 cast) — independent of 1–3.
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- **2026-07-17** — **Phase 4 landed `17ec6eee` → §2.5 / 0245 §2.2 serving cast COMPLETE.** `serving_cast(psi_steady, certificate, verdict) → ServingState` + `ServingCastError` in `core/physics/cognitive_lifecycle.py`; `tests/test_adr_0244_serving_cast.py` (10 tests). The single explicit, fail-closed f64→f32 down-cast at the certified egress: casts only a validated / digest-matched / admitted state; precision-checks the f32 result and fails closed on a cliff (`f32_precision_insufficient`); keeps f64 as source of truth (digest chain untouched) and carries audit provenance. Measured `cast_error ≈ 1.2e-8`. Off-serve (A-04 guard green). Gate: smoke 176 + fast lane + 10 targeted. Next: Phase 5 (§2.7 residual + §2.9 allocator + §2.10 audit + 0245 §3 gate).
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- **2026-07-17** — **Phase 4 landed `918aa843` → §2.5 / 0245 §2.2 serving cast COMPLETE.** `serving_cast(psi_steady, certificate, verdict) → ServingState` + `ServingCastError` in `core/physics/cognitive_lifecycle.py`; `tests/test_adr_0244_serving_cast.py` (10 tests). The single explicit, fail-closed f64→f32 down-cast at the certified egress: casts only a validated / digest-matched / admitted state; precision-checks the f32 result and fails closed on a cliff (`f32_precision_insufficient`); keeps f64 as source of truth (digest chain untouched) and carries audit provenance. Measured `cast_error ≈ 1.2e-8`. Off-serve (A-04 guard green). Gate: smoke 176 + fast lane + 10 targeted. Next: Phase 5 (§2.7 residual + §2.9 allocator + §2.10 audit + 0245 §3 gate).
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- **2026-07-17** — **Phase 5 landed (5a–5d) → all D4 build phases COMPLETE.** Four gated sub-commits closing the semantic-rigor + mechanical-sympathy tail. **5a §2.7** (`5c69b741`): four residual content-ids widened to full 256-bit digests (schema/plan_preflight/articulation_quality — dropped `default=str` — + holographic_vault `_default_mode_id` with explicit LE byte-order); 334 contemplation/vault tests green. **5b §2.9** (`4a550c1d`): recall order-independence **proven** (Gram lstsq onto span is permutation-invariant to ~1e-15; allocator ordinal-reconstructible) — wiring would be a category mismatch. **5c §2.10** (`eacea087`): the "reduce harmonic phase-locking" claim pinned (golden-ratio density, no `BB`/`AAA`, aperiodicity), not just structure. **5d §3** (`b31d6fde`): ADR-0245 §3 gate closed — Rust-guarded f32 **≥10× speedup** (measured **467×**) + `_content_id` collision-resistance + coverage manifest. Built `core_rs` locally to run the speedup + ~126 Rust-parity tests (all green; not committed). Gate: smoke 176 + fast lane + 43 targeted. **Next: Phase 6 (close-out) — the only remaining work; all §-mechanisms built.**
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@ -243,10 +248,10 @@ Forward-looking mechanical-sympathy items from the critique — a separate optim
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| 1 | §2.1 identity manifold primitive (operator-preservation) | ✅ DONE | `3c3d2c29` |
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| 2 | §2.2 fail-closed gate + boundary_ids + C_id + telemetry + eval | ✅ DONE | `1c7ea26e`+`c7e2b3b6`+`c0ff4720` |
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| 3 | §2.4 γ_id calibration (certified; **live flip BLOCKED — flag stays OFF**) | ✅ DONE | `f3702ad4` |
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| 4 | §2.5 / 0245 §2.2 serving-boundary cast | ✅ DONE | `17ec6eee` |
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| 5 | §2.7 residual + §2.9 wiring + §2.10 audit + 0245 §3 gate | ⬜ NOT STARTED | — |
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| 4 | §2.5 / 0245 §2.2 serving-boundary cast | ✅ DONE | `918aa843` |
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| 5 | §2.7 residual + §2.9 wiring + §2.10 audit + 0245 §3 gate | ✅ DONE | `5c69b741`+`4a550c1d`+`eacea087`+`b31d6fde` |
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| 6 | Close-out (2 acceptance packets + 2 ratified flips) | ⬜ NOT STARTED | — |
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**▶ NEXT: Phase 5 — §2.7 residual (3 contemplation content-id sites) + §2.9 allocator wiring + §2.10 audit-confirm + ADR-0245 §3 acceptance gate** (f32 ≥10× speedup benchmark + `_content_id` collision-resistance proof). Then Phase 6 (close-out: 2 acceptance packets + user-ratified status flips + cleanup).
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**▶ NEXT: Phase 6 — Close-out.** Two D10-pattern acceptance packets (`docs/audit/adr-0244-acceptance-packet-*.md`, `docs/audit/adr-0245-acceptance-packet-*.md`) + **user-ratified** Proposed→Accepted status flips for both ADRs (provenance guard: inline `**Accepted** — ratified by Joshua Shay <date>` + packet `## 8. RULING RECORD`; the anti-self-Accept test forbids me flipping status without explicit ratification) + memory + worktree/branch cleanup. **All build phases (0–5) are complete;** ADR-0244 §2.1–2.10 and ADR-0245 §2.1–2.4 + §3 are built/proven/audited. The one standing caveat carried into Phase 6 and the packets: **`identity_wave_gate` stays OFF** (Phase 3 live-non-separation finding) — the identity gate is validated scaffolding, not a live gate, pending ADR-0246.
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**Phase 3 headline for resumers:** the γ_id calibration machinery is built + certified, but the empirical finding is that **the live serving flag cannot honestly be flipped on** — real benign traffic doesn't preserve the nominal identity subspace (best balanced error 0.346), so the gate would mass-refuse. `identity_wave_gate` stays OFF; the live gate awaits the ADR-0246 induced-action work. This is a **true architectural-gap discovery**, faithfully honoring the plan's conditional ("flip *once evidenced*"), not a deviation.
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